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features ? performance specifed for bommon ipm applications over industrial temperature range: -40c to 100c ? fast maximum propagation delays t phl = 480 ns t plh = 550 ns ? minimized pulse width distortion pwd = 450 ns ? 15 kv/s minimum common mode transient immu - nity at v cm = 1500 v ? ctr > 44% at i f = 10 ma ? safety approval: ul recognized -3750 v rms / 1 min. for hcpl-4506/0466/j456 -5000 v rms / 1 min. for hcpl-4506 option 020 and hcnw4506 csa approved iec/en/din en 60747-5-2 approved -v iorm = 560 vpeak for hcpl-0466 option 060 -v iorm = 630 vpeak for hcpl-4506 option 060 -v iorm = 891 vpeak for hcpl-j456 -v iorm = 1414 vpeak for hcnw4506 applications ? ipm isolation ? isolated igbt/mosfet gate drive ? ac and brushless dc motor drives ? industrial inverters caution: it is advised that normal static precautions be taken in handling and assembly of this component to prevent damage and/or degradation which may be induced by esd. hcpl-4506 functional diagram 8 7 6 1 3 shield 5 2 4 20 k ? nc anode cathode nc v cc v l v o gnd hcpl-4506/j456/0466, hcnw4506 intelligent power module and gate drive interface optocouplers data sheet description the hcpl-4506 and hcpl-0466 contain a gaasp led while the hcpl-j456 and the hcnw4506 co n tain an algaas led. the led is optically coupled to an int e grated high gain photo detector. minimized propagation delay diference between devices makes these optocouplers excellent so - lutions for improving inverter efciency through reduced switching dead time. an on chip 20 k? output pull-up resistor can be enabled by shorting output pins 6 and 7, thus eliminating the need for an external pull-up resistor in common ipm applications. specifcations and performance plots are given for typical ipm applications. functional diagram the connection of a 0.1 f bypass capacitor between pins 5 and 8 is recommended. truth table led v o on l off h lead (pb) free rohs 6 fully compliant rohs 6 fully compliant options available; -xxxe denotes a lead-free product
2 selection guide standard white mold package 8-pin dip 8-pin dip small outline widebody type (300 mil) (300 mil) so8 (400 mil) hermetic* part hcpl-4506 hcpl-j456 hcpl-0466 hcnw4506 hcpl-5300 number hcpl-5301 iec/en/din v iorm = 630 vpeak v iorm = 891 vpeak v iorm = 560 vpeak v iorm = 1414 vpeak en 60747- (option 060) (option 060) 5-2 approval *technical data for these products are on separate avago publications.
3 ordering information hcpl-0466, hcpl-4506 and hcpl-j456 are ul recognized with 3750 vrms for 1 minute per ul1577. hcnw4506 is ul recognized with 5000 vrms for 1 minute per ul1577. hcpl-0466, hcpl-4506, hcpl-j456 and hcnw4506 are approved under csa component acceptance notice #5, file ca 88324. option part rohs non rohs surface gull tape ul 5000 vrms/ iec/en/din number compliant compliant package mount wing & reel 1 minute rating en 60747-5-2 quantity -000e no option 300 mil dip-8 50 per tube -300e #300 x x 50 per tube -500e #500 x x x 1000 per reel -020e #020 x 50 per tube hcpl-4506 -320e #320 x x x 50 per tube -520e #520 x x x x 1000 per reel -060e #060 x 50 per tube -360e #360 x x x 50 per tube -560e #560 x x x x 1000 per reel -000e no option 300 mil dip-8 x 50 per tube hcpl-j456 -300e #300 x x x 50 per tube -500e #500 x x x x 1000 per reel -000e no option so-8 x 100 per tube hcpl-0466 -500e #500 x x 1500 per reel -060e #060 x x 100 per tube -560e #560 x x x 1500 per reel -000e no option 400 mil x x 42 per tube hcnw4506 -300e #300 widebody x x x x 42 per tube -500e #500 dip-8 x x x x x 750 per reel to order, choose a part number from the part number column and combine with the desired option from the option column to form an order entry. example 1: hcpl-4506-560e to order product of 300 mil dip gull wing surface mount package in tape and reel packaging with iec/en/din en 60747-5-2 safety approval and rohs compliant. example 2: hcpl-4506 to order product of 300 mil dip package in tube packaging and non rohs compliant. option datasheets are available. contact your avago sales representative or authorized distributor for information. remarks: the notation #xxx is used for existing products, while (new) products launched since july 15, 2001 and rohs compliant will use Cxxxe.
4 package outline drawings hcpl-4506 outline drawing hcpl-4506 gull wing surface mount option 300 outline drawing 1.080 0.320 (0.043 0.013) 2.54 0.25 (0.100 0.010) 0.51 (0.020) min. 0.65 (0.025) max. 4.70 (0.185) max. 2.92 (0.115) min. 5 typ. 0.254 + 0.076 - 0.051 (0.010 + 0.003) - 0.002) 7.62 0.25 (0.300 0.010) 6.35 0.25 (0.250 0.010) 9.65 0.25 (0.380 0.010) 1.78 (0.070) max. 1.19 (0.047) max. a xxxxz yyw w date code dimensions in millimeters and (inches). 5 6 7 8 4 3 2 1 option code* ul recognition ur type number * marking code letter for option numbers "l" = option 020 "v" = option 060 option numbers 300 and 500 not marked. note: floating lead protrusion is 0.25 mm (10 mils) max. 3.56 0.13 (0.140 0.005) 0.635 0.25 (0.025 0.010) 12 nom. 9.65 0.25 (0.380 0.010) 0.635 0.130 (0.025 0.005) 7.62 0.25 (0.300 0.010) 5 6 7 8 4 3 2 1 9.65 0.25 (0.380 0.010) 6.350 0.25 (0.250 0.010) 1.016 (0.040) 1.27 (0.050) 10.9 (0.430) 2.0 (0.080) land pattern recommendation 1.080 0.320 (0.043 0.013) 1.780 (0.070) max. 1.19 (0.047) max. 2.54 (0.100) bsc dimensions in millimeters (inches). lead coplanarity = 0.10 mm (0.004 inches). 0.254 + 0.076 - 0.051 (0.010 + 0.003) - 0.002) note: floating lead protrusion is 0.25 mm (10 mils) max. 3.56 0.13 (0.140 0.005)
5 package outline drawings hcpl-j456 outline drawing hcpl-j456 gull wing surface mount option 300 outline drawing 1.080 0.320 (0.043 0.013) 2.54 0.25 (0.100 0.010) 0.51 (0.020) min. 0.65 (0.025) max. 4.70 (0.185) max. 2.92 (0.115) min. 5 typ. 0.254 + 0.076 - 0.051 (0.010 + 0.003) - 0.002) 7.62 0.25 (0.300 0.010) 6.35 0.25 (0.250 0.010) 9.80 0.25 (0.386 0.010) 1.78 (0.070) max. 1.19 (0.047) max. a xxxxz yyw w date code dimensions in millimeters and (inches). 5 6 7 8 4 3 2 1 option code* ul recognition ur type number * marking code letter for option numbers "l" = option 020 "v" = option 060 option numbers 300 and 500 not marked. note: floating lead protrusion is 0.5 mm (20 mils) max. 3.56 0.13 (0.140 0.005) 0.635 0.25 (0.025 0.010) 12 nom. 9.65 0.25 (0.380 0.010) 0.635 0.130 (0.025 0.005) 7.62 0.25 (0.300 0.010) 5 6 7 8 4 3 2 1 9.80 0.25 (0.386 0.010) 6.350 0.25 (0.250 0.010) 1.016 (0.040) 1.27 (0.050) 10.9 (0.430) 2.0 (0.080) land pattern recommendation 1.080 0.320 (0.043 0.013) 1.780 (0.070) max. 1.19 (0.047) max. 2.54 (0.100) bsc dimensions in millimeters (inches). lead coplanarity = 0.10 mm (0.004 inches). 0.254 + 0.076 - 0.051 (0.010 + 0.003) - 0.002) note: floating lead protrusion is 0.5 mm (20 mils) max. 3.56 0.13 (0.140 0.005)
6 hcpl-0466 outline drawing (8-pin small outline package) hcnw4506 outline drawing (8-pin widebody package) 5 6 7 8 4 3 2 1 11.15 0.15 (0.442 0.006) 1.78 0.15 (0.070 0.006) 5.10 (0.201) max. 1.55 (0.061) max. 2.54 (0.100) typ. dimensions in millimeters (inches). note: floating lead protrusion is 0.25 mm (10 mils) max. 7 typ. 0.254 + 0.076 - 0.0051 (0.010 + 0.003) - 0.002) 11.00 (0.433) 9.00 0.15 (0.354 0.006) max. 10.16 (0.400) typ. a hcnwxxxx yyw w date code type number 0.51 (0.021) min. 0.40 (0.016) 0.56 (0.022) 3.10 (0.122) 3.90 (0.154) xxx yw w 8 7 6 5 4 3 2 1 5.994 0.203 (0.236 0.008) 3.937 0.127 (0.155 0.005) 0.406 0.076 (0.016 0.003) 1.270 (0.050) bsc 5.080 0.127 (0.200 0.005) 3.175 0.127 (0.125 0.005) 1.524 (0.060) 45 x 0.432 (0.017) 0.228 0.025 (0.009 0.001) type number (last 3 digits) date code 0.305 (0.012) min. total package length (inclusive of mold flash ) 5.207 0.254 (0.205 0.010) dimensions in millimeters (inches). lead coplanarity = 0.10 mm (0.004 inches) max . note: floating lead protrusion is 0.15 mm (6 mils) max. 0.203 0.102 (0.008 0.004) 7 pin one 0 ~ 7 * * 7.49 (0.295) 1.9 (0.075) 0.64 (0.025) land pattern recommendation
7 hcnw4506 gull wing surface mount option 300 outline drawing 1.00 0.15 (0.039 0.006) 7 nom. 12.30 0.30 (0.484 0.012) 0.75 0.25 (0.030 0.010) 11.00 (0.433) 5 6 7 8 4 3 2 1 11.15 0.15 (0.442 0.006) 9.00 0.15 (0.354 0.006) 1.3 (0.051) 13.56 (0.534) 2.29 (0.09) land pattern recommendation 1.78 0.15 (0.070 0.006) 4.00 (0.158) max. 1.55 (0.061) max. 2.54 (0.100) bsc dimensions in millimeters (inches). lead coplanarity = 0.10 mm (0.004 inches). note: floating lead protrusion is 0.25 mm (10 mils) max. 0.254 + 0.076 - 0.0051 (0.010 + 0.003) - 0.002) max.
8 recommended pb-free ir profle solder refow temperature profle 0 t i m e ( s e c o n d s ) t e m p e r a t u r e ( c ) 2 0 0 1 0 0 5 0 1 5 0 1 0 0 2 0 0 2 5 0 3 0 0 0 3 0 s e c . 5 0 s e c . 3 0 s e c . 1 6 0 c 1 4 0 c 1 5 0 c p e a k t e m p . 2 4 5 c p e a k t e m p . 2 4 0 c p e a k t e m p . 2 3 0 c s o l d e r i n g t i m e 2 0 0 c p r e h e a t i n g t i m e 1 5 0 c , 9 0 + 3 0 s e c . 2 . 5 c 0 . 5 c / s e c . 3 c + 1 c / ? 0 . 5 c t i g h t t y p i c a l l o o s e r o o m t e m p e r a t u r e p r e h e a t i n g r a t e 3 c + 1 c / ? 0 . 5 c / s e c . r e f l o w h e a t i n g r a t e 2 . 5 c 0 . 5 c / s e c . n o t e : n o n - h a l i d e f l u x s h o u l d b e u s e d . 2 1 7 c r a m p - d o w n 6 c / s e c . m a x . r a m p - u p 3 c / s e c . m a x . 1 5 0 - 2 0 0 c * 2 6 0 + 0 / - 5 c t 2 5 c t o p e a k 6 0 t o 1 5 0 s e c . 1 5 s e c . t i m e w i t h i n 5 c o f a c t u a l p e a k t e m p e r a t u r e t p t s p r e h e a t 6 0 t o 1 8 0 s e c . t l t l t s m a x t s m i n 2 5 t p t i m e t e m p e r a t u r e n o t e s : t h e t i m e f r o m 2 5 c t o p e a k t e m p e r a t u r e = 8 m i n u t e s m a x . t s m a x = 2 0 0 c , t s m i n = 1 5 0 c n o t e : n o n - h a l i d e f l u x s h o u l d b e u s e d . * r e c o m m e n d e d p e a k t e m p e r a t u r e f o r w i d e b o d y 4 0 0 m i l s p a c k a g e i s 2 4 5 c
9 insulation and safety related specifcations value parameter symbol hcpl-4506 hcpl-j456 hcpl-0466 hcnw4506 units conditions minimum external l(101) 7.1 7.4 4.9 9.6 mm measured from input air gap (external terminals to output clearance) terminals, shortest distance through air. minimum external l(102) 7.4 8.0 4.8 10.0 mm measured from input tracking (external terminals to output creepage) terminals, shortest distance path along body. minimum internal 0.08 0.5 0.08 1.0 mm through insulation plastic gap distance, conductor to (internal clearance) conductor, usually the direct distance between the photoemitter and photodetector inside the optocoupler cavity. minimum internal na na na 4.0 mm measured from input tracking (internal terminals to output creepage) terminals, along internal cavity. tracking resistance cti 175 175 175 200 volts din iec 112/vde 0303 (comparative part 1 tracing index) isolation group iiia iiia iiia iiia material group (din vde 0110, 1/89, table 1) regulatory information the devices contained in this data sheet have been approved by the following agencies: agency/standard hcpl-4506 hcpl-j456 hcpl-0466 hcnw4506 underwriters laboratories (ul) ul 1577 recognized under ul 1577, component ? ? ? ? recognized program, category fpqu2, file e55361 canadian standards component association (csa) acceptance ? ? ? ? file ca88324 notice #5 verband deutscher din vde 0884 electrotechniker (vde) (june 1992) ? ? ? iec/en/din en 60747-5-2 approved under: iec 60747-5-2:1997 + a1:2002 ? ? ? ? en 60747-5-2:2001 + a1:2002 din en 60747-5-2 (vde 0884 teil 2):2003-01
10 iec/en/din en 60747-5-2 insulation related characteristics hcpl-0466 hcpl-4506 description symbol option 060 option 060 hcpl-j456 hcnw4506 unit installation classifcation per din vde 0110/1.89, table 1 for rated mains voltage 150 v rms i-iv i-iv i-iv i-iv for rated mains voltage 300 v rms i-iii i-iv i-iv i-iv for rated mains voltage 450 v rms i-iii i-iii i-iv for rated mains voltage 600 v rms i-iii i-iv for rated mains voltage 1000 v rms i-iii climatic classifcation 55/100/21 55/100/21 55/100/21 55/100/21 pollution degree 2 2 2 2 (din vde 0110/1.89) maximum working v iorm 560 630 891 1414 v peak insulation voltage input to output test voltage, method b* v iorm x 1.875 = v pr , 100% production test with t m = v pr 1050 1181 1670 2652 v peak 1 sec, partial discharge < 5pc input to output test voltage, method a* v iorm x 1.5 = v pr , type and sample test, t m = 60 sec, v pr 840 945 1336 2121 v peak partial discharge < 5pc highest allowable overvoltage* v iotm 4000 6000 6000 8000 v peak (transient overvoltage, t ini = 10 sec) safety limiting values C maximum values allowed in the event of a fail- ure, also see thermal derating curve. case temperature t s 150 175 175 150 c input current i s input 150 230 400 400 ma output power p s output 600 600 600 700 mw insulation resistance at t s , r s 10 9 10 9 10 9 10 9 v io = 500 v *refer to the optocoupler section of the designer's catalog, under regulatory information (iec/en/din en 60747-5-2) for a detailed description of method a and method b partial discharge test profles. notes: these optocouplers are suitable for "safe electrical isolation" only within the safety limit data. maintenance of the safety data shall be ensured by means of protective circuits. insulation characteristics are per iec/en/din en 60747-5-2. surface mount classifcation is class a in accordance with cecc 00802. all avago data sheets report the creepage and clearance inherent to the optocoupler component itself. these di - mensions are needed as a starting point for the equip - ment designer when determining the circuit insulation requir e ments. however, once mounted on a printed circuit board, minimum creepage and clearance require - ments must be met as specifed for individual equipment standards. for creepage, the shortest distance path along the surface of a printed circuit board between the solder fllets of the input and output leads must be considered. there are reco mmend ed tech niques such as grooves and ribs which may be used on a printed circuit board to achieve desired creepage and clea r ances. creepage and clearance distances will also change depending on fac - tors such as pollution degree and insulation level.
11 absolute maximum ratings parameter symbol min. max. units storage temperature t s -55 125 c operating temperature t a -40 100 c average input current [1] i f(avg) 25 ma peak input current [2] (50% duty cycle, 1 ms pulse width) i f(peak) 50 ma peak transient input current (<1 s pulse width, 300 pps) i f(tran) 1.0 a reverse input voltage (pin 3-2) hcpl-4506, hcpl-0466 v r 5 volts hcpl-j456, hcnw4506 3 average output current (pin 6) i o(avg) 15 ma resistor voltage (pin 7) v 7 -0.5 v cc volts output voltage (pin 6-5) v o -0.5 30 volts supply voltage (pin 8-5) v cc -0.5 30 volts output power dissipation [3] p o 100 mw total power dissipation [4] p t 145 mw lead solder temperature (hcpl-4506, hcpl-j456) 260c for 10 s, 1.6 mm below seating plane lead solder temperature (hcnw4506) 260c for 10 s (up to seating plane) infrared and vapor phase refow temperature see package outline drawings section (hcpl-0466 and option 300) recommended operating conditions parameter symbol min. max. units power supply voltage v cc 4.5 30 volts output voltage v o 0 30 volts input current (on) i f(on) 10 20 ma input voltage (off) v f(of ) * -5 0.8 v operating temperature t a -40 100 c *recommended v f(off) = -3 v to 0.8 v for hcpl-j456, hcnw4506.
12 electrical specifcations over recommended operating conditions unless otherwise specifed: t a = -40c to +100c, v cc = +4.5 v to 30 v, i f(on) = 10 ma to 20 ma, v f(of ) = -5 v to 0.8 v? parameter symbol device min. typ.* max. units test conditions fig. note current transfer ratio ctr 44 90 % i f = 10 ma, 5 v o = 0.6 v low level output current i ol 4.4 9.0 ma i f = 10 ma, 1, 2 v o = 0.6 v low level output voltage v ol 0.3 0.6 v i o = 2.4 ma input threshold current i th hcpl-4506 1.5 5 ma v o = 0.8 v, 1 16 hcpl-0466 i o = 0.75 ma hcnw4506 hcpl-j456 0.6 high level output current i oh 5 50 a v f = 0.8 v 3 high level supply current i cch 0.6 1.3 ma v f = 0.8 v, 16 v o = open low level supply current i ccl 0.6 1.3 ma i f = 10 ma, 16 v o = open input forward voltage v f hcpl-4506 1.5 1.8 v i f = 10 ma 4 hcpl-0466 hcpl-j456 1.2 1.6 1.95 5 hcnw4506 1.6 1.85 temperature coefcient ?v f /?t a hcpl-4506 -1.6 mv/c i f = 10 ma of forward voltage hcpl-0466 hcpl-j456 hcnw4506 -1.3 input reverse breakdown bv r hcpl-4506 5 v i r = 10 a voltage hcpl-0466 hcpl-j456 3 i r = 100 a hcnw4506 input capacitance c in hcpl-4506 60 pf f = 1 mhz, hcpl-0466 v f = 0 v hcpl-j456 72 hcnw4506 internal pull-up resistor r l 14 20 25 k t a = 25c 12, 13 internal pull-up resistor ?r l /?t a 0.014 k/c temperature coefcient *all typical values at 25c, v cc = 15 v. ?v f(of ) = -3 v to 0.8 v for hcpl-j456, hcnw4506.
13 switching specifcations (r l = internal pull-up) over recommended operating conditions unless otherwise specifed: t a = -40c to +100c, v cc = +4.5 v to 30 v, i f(on) = 10 ma to 20 ma, v f(of ) = -5 v to 0.8 v? parameter symbol min. typ.* max. units test conditions fig. note propagation delay t phl 20 200 400 ns i f(on) = 10 ma, v f(of ) = 0.8 v, 6, 9 11-14, time to logic hcpl-j456 485 v cc = 15.0 v, c l = 100 pf, 16 low at output v thlh = 2.0 v, v thhl = 1.5 v propagation delay time t plh 220 450 650 ns to high output level pulse width pwd 250 500 ns 20 distortion propagation delay t plh -t phl -150 250 500 ns 17 diference between any 2 parts output high level |cm h | 30 kv/s i f = 0 ma, v cc = 15.0 v, 7 18 common mode v o > 3.0 v c l = 100 pf, transient immunity v cm = 1500 v p-p , output low level |cm l | 30 kv/s i f = 16 ma, t a = 25c 19 common mode v o < 1.0 v transient immunity power supply psr 1.0 v p-p square wave, t rise , t fall 16 rejection > 5 ns, no bypass capacitors switching specifcations (r l = 20 k? external) over recommended operating conditions unless otherwise specifed: t a = -40c to +100c, v cc = +4.5 v to 30 v, i f(on) = 10 ma to 20 ma, v f(of ) = -5 v to 0.8 v? parameter symbol min. typ.* max. units test conditions fig. note propagation delay t phl 30 200 400 ns c l = 100 pf i f(on) = 10 ma, 6, 8, 11, time to logic hcpl-j456 480 v f(of ) = 0.8 v, 10- 14, low at output 100 c l = 10 pf v cc = 15.0 v, 13 16 propagation delay t plh 270 400 550 ns c l = 100 pf v thlh = 2.0 v, time to high v thhl = 1.5 v output level 130 c l = 10 pf pulse width pwd 200 450 ns c l = 100 pf 20 distortion propagation delay t plh -t phl -150 200 450 ns 17 diference between any 2 parts output high level |cm h | 15 30 kv/s i f = 0 ma, v cc = 15.0 v, 7 18 common mode v o > 3.0 v c l = 100 pf, transient immunity v cm = 1500 v p-p output low level |cm l | 15 30 kv/s i f = 10 ma t a = 25c 19 common mode v o < 1.0 v transient immunity *all typical values at 25c, v cc = 15 v. ?v f(of ) = -3 v to 0.8 v for hcpl-j456, hcnw4506.
14 package characteristics over recommended temperature (t a = -40c to 100c) unless otherwise specifed. parameter sym. device min. typ.* max. units test conditions fig. note input-output momentary v iso hcpl-4506 3750 v rms rh < 50% 6,7,10 withstand voltage? hcpl-0466 t = 1 min. hcpl-j456 3750 t a = 25c 6,8,10 hcpl-4506 5000 6,9, option020 15 hcnw4506 5000 6,9,10 resistance r i-o hcpl-4506 10 12 v i-o = 500 vdc 6 (input-output) hcpl-j456 hcpl-0466 hcnw4506 10 12 10 13 capacitance c i-o hcpl-4506 0.6 pf f = 1 mhz 6 (input-output) hcpl-0466 hcpl-j456 0.8 hcnw4506 0.5 *all typical values at 25c, v cc = 15 v. ?the input-output momentary withstand voltage is a dielectric voltage rating that should not be interpreted as an input-output continuous voltage rating. for the continuous voltage rating refer to the iec/en/din en 60747-5-2 insulation related characteristics table (if applicable), your equipment level safety specifcation or avago application note 1074 entitled optocoupler input-output endurance voltage, publication num - ber 5963-2203e. notes: 1. derate linearly above 90c free-air temperature at a rate of 0.8 ma/c. 2. derate linearly above 90c free-air temperature at a rate of 1.6 ma/c. 3. derate linearly above 90c free-air temperature at a rate of 3.0 mw/c. 4. derate linearly above 90c free-air temperature at a rate of 4.2 mw/c. 5. current transfer ratio in percent is defned as the ratio of output collector current (i o ) to the forward led input current (i f ) times 100. 6. device considered a two-terminal device: pins 1, 2, 3, and 4 shorted together and pins 5, 6, 7, and 8 shorted together. 7. in accordance with ul 1577, each optocoupler is proof tested by appl y ing an insulation test voltage 4500 v rms for 1 second (leakage detection current limit, i i-o 5 a). 8. in accordance with ul 1577, each optocoupler is proof tested by applying an insulation test voltage 4500 v rms for 1 second (leakage detection current limit, i i-o 5 a). 9. in accordance with ul 1577, each optocoupler is proof tested by applying an insulation test voltage 6000 v rms for 1 second (leakage detection current limit, i i-o 5 a). 10. this test is performed before the 100% production test shown in the iec/en/din en 60747-5-2 insulation related characteristics table, if ap - plicable. 11. pulse: f = 20 khz, duty cycle = 10%. 12. the internal 20 k resistor can be used by shorting pins 6 and 7 together. 13. due to tolerance of the internal resistor, and since propagation delay is dependent on the load resistor value, performance can be improved by using an external 20 k 1% load resistor. for more information on how propagation delay varies with load resistance, see figure 8. 14. the r l = 20 k, c l = 100 pf load represents a typical ipm (intelligent power module) load. 15. see option 020 data sheet for more information. 16. use of a 0.1 f bypass capacitor connected between pins 5 and 8 can improve performance by fltering power supply line noise. 17. the diference between t plh and t phl between any two devices under the same test condition. (see ipm dead time and propagation delay specifcations section.) 18. common mode transient immunity in a logic high level is the maximum tolerable dv cm /dt of the common mode pulse, v cm , to assure that the output will remain in a logic high state (i.e., v o > 3.0 v). 19. common mode transient immunity in a logic low level is the maximum tolerable dv cm /dt of the common mode pulse, v cm , to assure that the output will remain in a logic low state (i.e., v o < 1.0 v). 20. pulse width distortion (pwd) is defned as |t phl - t plh | for any given device.
15 figure 4. hcpl-4506 and hcpl-0466 input cur - rent vs. forward voltage. figure 5. hcpl-j456 and hcnw4506 input cur - rent vs. forward voltage. figure 2. normalized output current vs. tem - perature. figure 1. typical transfer characteristics. figure 3. high level output current vs. temperature. figure 6. propagation delay test circuit. i f ? forward current ? ma 1.10 0.001 v f ? forward voltage ? volts 1.60 10 1.0 0.1 1.20 hcpl-4506 fig 8 1000 1.30 1.40 1.50 t a = 25c i f v f + ? 0.01 100 hcpl-4506/0466 i f ? input forward current ? ma 0.001 v f ? input forward voltage ? v 1 0.1 0.01 1.0 hcpl-4506 fig 9 100 1.4 1.8 2.0 t a = 25 c 10 0.8 1.2 1.6 i f v f + ? hcpl-j456/hcnw4506 hcpl-4506 fi g 10 0.1 f v cc = 15 v 20 k ? i f(on) =10 ma v out c l * + ? *total load capacitance + ? i f v o v thhl t phl t plh t f t r 90% 10% 90% 10% v thlh 8 7 6 1 3 shield 5 2 4 5 v 20 k ? i o ? output current ? ma 0 i f ? forward led current ? ma 6 4 2 5 hcpl-4506 fig 5 10 10 15 20 v o = 0.6 v 8 0 100 c 25 c -40 c normalized output current t a ? temperature ? c 0.95 0.90 0.85 0 hcpl-4506 fig 6 40 60 100 i f = 10 ma v o = 0.6 v 1.00 -40 -20 20 80 1.05 0.80 i oh ? high level output current ? a t a ? temperature ? c 15.0 10.0 5.0 0 hcpl-4506 fig 7 40 60 100 20.0 -40 -20 20 80 0 4.5 v 30 v v f = 0.8 v v cc = v o = 4.5 v or 30 v
16 t p ? propagation delay ? ns rl ? load resistance ? k ? 600 400 200 hcpl-4506 fig 14 30 50 800 0 1 0 20 40 t pl h t phl i f = 10 ma v cc = 15 v cl = 100 pf t a = 25 c figure 8. propagation delay with external 20 k? rl vs. temperature. figure 9. propagation delay with internal 20 k? rl vs. temperature. figure 10. propagation delay vs. load resistance. figure 7. cmr test circuit. typical cmr waveform. figure 13. propagation delay vs. input current. figure 11. propagation delay vs. load capaci - tance. figure 12. propagation delay vs. supply voltage. hcpl-4506 fig 11a 0.1 f v cc = 15 v 20 k ? a i f v out 100 pf* + ? *100 pf total capacitance + ? + ? b v ff v cm = 1500 v 8 7 6 1 3 shield 5 2 4 20 k ? hcpl-4506 fig 11b v cm ? t ov v o v o switch at a: i f = 0 ma switch at b: i f = 10 ma v cc v ol v cm ? t v t = t p ? propagation delay ? ns t a ? temperature ? c 400 300 200 0 hcpl-4506 fig 12 40 60 100 500 -40 -20 20 80 t pl h t phl i f = 10 ma v cc = 15 v cl = 100 pf rl = 20 k ? (external) 100 t p ? propagation delay ? ns 0 cl ? load capacitance ? pf 800 600 400 100 hcpl-4506 fig 15 1400 200 300 400 i f = 10 ma v cc = 15 v rl = 20 k ? t a = 25c 200 1000 t plh t ph l 1200 0 500 t p ? propagation delay ? ns 0 v cc ? supply voltage ? v 800 600 400 10 hcpl-4506 fig 16 1400 15 20 25 i f = 10 ma cl = 100 pf rl = 20 k ? t a = 25c 200 1000 t pl h t phl 5 3 0 1200 t p ? propagation delay ? ns 100 i f ? forward led current ? ma 300 10 hcpl-4506 fig 17 500 15 v cc = 15 v cl = 100 pf rl = 20 k ? t a = 25c 200 400 t pl h t phl 5 0 2 0 t p ? propagation delay ? ns t a ? temperature ? c 400 300 200 0 hcpl-4506 fig 13 40 60 100 600 -40 -20 20 80 t plh t ph l 100 i f = 10 ma v cc = 15 v cl = 100 pf rl = 20 k ? (internal) 500
17 figure 16. optocoupler input to output capacitance model for unshielded optocouplers. figure 15. recommended led drive circuit. figure 14. thermal derating curve, dependence of safety limiting value with case temperature per iec/en/din en 60747-5-2. figure 18. led drive circuit with resistor connected to led anode (not recommended). figure 17. optocoupler input to output capaci - tance model for shielded optocouplers. hcpl-4506 fig 18a output power ? p s , input current ? i s 0 0 t s ? case temperature ? c 200 50 400 125 25 75 100 150 600 800 200 100 300 500 700 p s (mw) hcpl-4506 option 060/hcpl-j456 175 (230) i s (ma) for hcpl-4506 option 060 i s (ma) for hcpl-j456 output power ? p s , input current ? i s 0 0 t s ? case temperature ? c 175 hcpl-4504 fig 18b 1000 50 400 125 25 75 100 150 600 800 200 100 300 500 700 900 p s (mw) for hcnw4506 i s (ma) for hcnw4506 hcpl-0466 option 060/hcnw4506 p s (mw) for hcpl-0466 option 060 i s (ma) for hcpl-0466 option 060 (150) 0.1 f v cc = 15 v 20 k ? hcpl-4506 fig 19-new cmos 310 ? +5 v v out 100 pf + ? *100 pf total capacitance 8 7 6 1 3 shield 5 2 4 20 k ? hcpl-4506 fig 20-new 8 7 6 1 3 shield 5 2 4 c ledp c ledn 20 k ? hcpl-4506 fig 21-new 8 7 6 1 3 shield 5 2 4 c ledp c ledn c led01 c led02 20 k ? 0.1 f v cc = 15 v 20 k ? hcpl-4506 fig 22-new cmos 310 ? +5 v v out 100 pf + ? *100 pf total capacitance 8 7 6 1 3 shield 5 2 4 20 k ?
18 figure 23. recommended led drive circuit for ultra high cmr. figure 20. ac equivalent circuit for figure 15 during common mode transients. figure 19. ac equivalent circuit for figure 18 during common mode transients. figure 21. not recommended open collector led drive circuit. figure 22. ac equivalent circuit for figure 21 during common mode transients. 20 k ? hcpl-4506 fig 23-new * the arrows indicate the direction of current flow for +dv cm /dt transients. 310 ? v out 100 pf + ? i total* v cm 8 7 6 1 3 shield 5 2 4 20 k ? c ledn c led01 c led02 i cledp i f c ledp i cled01 20 k ? hcpl-4506 fig 24-new * the arrows indicate the direction of current flow for +dv cm /dt transients. ** optional clamping diode for improved cmh performance. v r < v f (off) during +dv cm /dt. v out 100 pf + ? v cm 8 7 6 1 3 shield 5 2 4 20 k ? c ledp c ledn c led01 c led02 i cledn* 310 ? + v r ** ? hcpl-4506 fig 25-new q1 +5 v 8 7 6 1 3 shield 5 2 4 20 k ? 20 k ? hcpl-4506 fig 26-new * the arrows indicate the direction of current flow for +dv cm /dt transients. v out 100 pf + ? v cm 8 7 6 1 3 shield 5 2 4 20 k ? c ledp c ledn c led01 c led02 i cledn* q1 hcpl-4506 fig 27 +5 v 8 7 6 1 3 shield 5 2 4 20 k ?
19 figure 24. typical application circuit. figure 26. waveforms for dead time calculation. figure 25. minimum led skew for zero dead time. 0.1 f 20 k ? hcpl-4506 fig 28 cmos 310 ? +5 v v out 1 i led1 v cc1 m hcpl-4506 hcpl-4506 hcpl-4506 hcpl-4506 hcpl-4506 q2 q1 -h v +hv ip m 8 7 6 1 3 shield 5 2 4 20 k ? hcpl-4506 0.1 f 20 k ? cmos 310 ? +5 v v out 2 i led2 v cc2 8 7 6 1 3 shield 5 2 4 20 k ? hcpl-4506 hcpl-4506 fig 29 v out 1 v out 2 i led2 t plh max. pdd* max. = (t plh- t phl ) max. = t plh max. - t phl min. t phl min. i led1 q1 on q2 off q1 off q2 on *pdd = propagation delay difference note: the propagation delays used to calculate pdd are taken at equal temperatures. hcpl-4506 fig 30 v out 1 v out 2 i led2 t plh min. maximum dead time (due to optocoupler) = (t plh max. - t plh min. ) + (t phl max. - t phl min. ) = (t plh max. - t phl min. ) - (t plh min. - t phl max. ) = pdd* max. - pdd* min. t phl min. i led1 q1 on q2 off q1 off q2 on *pdd = propagation delay difference t pl h max. t phl max . pdd* max. max. dead time note: the propagation delays used to calculate the maximum dead time are taken at equal temperatures.
20 led drive circuit considerations for ultra high cmr performance without a detector shield, the dominant cause of op - tocoupler cmr failure is capacitive coup l -ing from the input side of the optocoupler, through the package, to the detector ic as shown in figure 16. the hcpl-4506 series improve cmr performance by using a detector ic with an optically transparent faraday shield, which diverts the capac i tively coupled current away from the sensitive ic circuitry. however, this shield does not elimi - nate the capacitive coupling between the led and the opt o coupler output pins and output ground as shown in figure 17. this capacitive coupling causes perturbations in the led current during common mode transients and becomes the major source of cmr failures for a shielded opt o coupler. the main design objective of a high cmr led drive circuit becomes keeping the led in the proper state (on or of ) during common mode transients. for ex - ample, the recommended application circuit (figure 15), can achieve 15 kv/s cmr while minimizing component co m plexity. note that a cmos gate is recommended in figure 15 to keep the led of when the gate is in the high state. another cause of cmr failure for a shielded optocoupler is direct coupling to the optocoupler output pins through c ledo1 and c ledo2 in figure 17. many factors infuence the efect and magn i tude of the direct coupling includ - ing: the use of an internal or external output pull-up re - sistor, the position of the led current setting resistor, the connection of the unused input package pins, and the value of the capacitor at the optocoupler output (c l ). techniques to keep the led in the proper state and mini - mize the efect of the direct coupling are discussed in the next two sections. cmr with the led on (cmr l ) a high cmr led drive circuit must keep the led on dur - ing common mode transients. this is achieved by over - driving the led current beyond the input threshold so that it is not pulled below the threshold during a tran - sient. the recommended minimum led current of 10 ma provides adequate margin over the maximum i th of 5.0 ma (see figure 1) to achieve 15 kv/s cmr. capacitive coupling is higher when the internal load resistor is used (due to c ledo2 ) and an i f = 16 ma is required to obtain 10 kv/s cmr. the placement of the led current setting resistor efects the ability of the drive circuit to keep the led on dur - ing transients and interacts with the direct coupling to the optocoupler output. for example, the led resistor in figure 18 is connected to the anode. figure 19 shows the ac equivalent circuit for figure 18 during common mode transients. during a +dvcm/dt in figure 19, the current available at the led anode (itotal) is limited by the series resistor. the led current (i f ) is reduced from its dc value by an amount equal to the current that fows through c ledp and c ledo1 . the situation is made worse because the current through c ledo1 has the efect of trying to pull the output high (toward a cmr failure) at the same time the led current is being reduced. for this reason, the recommended led drive circuit (figure 15) places the current setting resistor in series with the led cathode. figure 20 is the ac equivalent circuit for figure 15 during common mode transients. in this case, the led current is not reduced during a +dvcm/dt transient because the current fowing through the package capacitance is sup - plied by the power supply. during a - dvcm/dt transient, however, the led current is reduced by the amount of current fowing through c ledn . but, better cmr perfor - mance is achieved since the current fowing in c ledo1 during a negative transient acts to keep the output low. coupling to the led and output pins is also afected by the co nnec tion of pins 1 and 4. if cmr is limited by per - turbations in the led on current, as it is for the recom - mended drive circuit (figure 15), pins 1 and 4 should be connected to the input circuit common. however, if cmr performance is limited by direct coupling to the output when the led is of, pins 1 and 4 should be left uncon - nected. cmr with the led of (cmr h ) a high cmr led drive circuit must keep the led of (v f v f(off) ) during common mode transients. for ex - ample, during a +dvcm/dt transient in figure 20, the current fowing through c ledn is supplied by the parallel combination of the led and series resistor. as long as the voltage developed across the resistor is less than v f(off) the led will remain of and no common mode failure will occur. even if the led momentarily turns on, the 100 pf capacitor from pins 6-5 will keep the output from dip - ping below the threshold. the recommended led drive circuit (figure 15) provides about 10 v of margin between the lowest optocoupler output voltage and a 3 v ipm threshold during a 15 kv/s transient with v cm = 1500 v. additional margin can be obtained by adding a diode in parallel with the resistor, as shown by the dashed line co nnec tion in figure 20, to clamp the voltage across the led below v f(off) . since the open collector drive circuit, shown in figure 21, cannot keep the led of during a +dvcm/dt transient, it is not desirable for applications requiring ultra high cmr h performance. figure 22 is the ac equivalent circuit for figure 21 during common mode transients. essentially all the current fowing through c ledn during a +dvcm/dt transient must be supplied by the led. cmr h failures can occur at dv/dt rates where the current through the led and c ledn exceeds the input threshold. figure 23 is an alternative drive circuit which does achieve ultra high cmr performance by shunting the led in the of state.
for product information and a complete list of distributors, please go to our website: www.avagotech.com avago, avago technologies, and the a logo are trademarks of avago technologies limited in the united states and other countries. data subject to change. copyright ? 2005-2008 avago technologies limited. all rights reserved. obsoletes av01-0551en av02-1360en - june 20, 2008 ipm dead time and propagation delay specifcations the hcpl-4506 series include a prop a gation delay difer - ence specifc a tion intended to help designers minimize dead time in their power inverter designs. dead time is the time period during which both the high and low side power transistors (q1 and q2 in figure 24) are of. any overlap in q1 and q2 condu c tion will result in large cur - rents fo w ing through the power devices between the high and low voltage motor rails. to minimize dead time the designer must consider the prop aga tion delay characteristics of the optocoupler as well as the chara c teristics of the ipm igbt gate drive circuit. considering only the delay characteristics of the opt o coupler (the characteristics of the ipm igbt gate drive circuit can be analyzed in the same way) it is impor - tant to know the min i mum and maximum turn-on (t phl ) and turn-of (t plh ) propagation delay specifcations, pref - erably over the desired operating temperature range. the limiting case of zero dead time occurs when the in - put to q1 turns of at the same time that the input to q2 turns on. this case determines the minimum de - lay between led1 turn-of and led2 turn-on, which is related to the worst case optocoupler propag a tion delay waveforms, as shown in figure 25. a minimum dead time of zero is achieved in figure 25 when the signal to turn on led2 is delayed by (t plh max - t phl min ) from the led1 turn of. note that the propagation delays used to calculate pdd are taken at equal tem - peratures since the opt o couplers under consideration are typically mounted in close proximity to each other. (specifcally, t plh max and t phl min in the previous equa - tion are not the same as the t plh max and t phl min , over the full operating temperature range, specifed in the data sheet.) this delay is the maximum value for the propaga - tion delay dife r ence specifcation which is specifed at 450 ns for the hcpl-4506 series over an operating tem - perature range of - 40c to 100c. delaying the led signal by the maximum propagation delay di f erence ensures that the min i mum dead time is zero, but it does not tell a designer what the maxi - mum dead time will be. the maximum dead time oc - curs in the highly unlikely case where one opt o coupler with the fastest t plh and another with the slowest t phl are in the same inverter leg. the maximum dead time in this case becomes the sum of the spread in the t plh and t phl propagation delays as shown in figure 26. the maximum dead time is also equivalent to the difer - ence between the maximum and min i mum propagation delay diference specifcations. the maximum dead time (due to the optocou p lers) for the hcpl-4506 series is 600 ns (= 450 ns - (-150 ns) ) over an operating tempera - ture range of - 40c to 100c.

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